PWM controller repair reference

SG3525A Welder PWM Controller: Pin Checks and No-PWM Diagnosis

Use the checks below to separate controller, timing, shutdown, output-supply and downstream driver faults.

Fast diagnostic sequence

OrderMeasureExpected evidenceIf missing
1Pin 15 VCC to pin 12 GNDStable controller supply within the board design and device operating range.Repair the auxiliary supply, ground path or local decoupling first.
2Pin 16 VREFApproximately 5.1 V.Check VCC, VREF loading and the IC.
3Pin 5 CT and pin 4 oscillator outputTiming ramp and clock activity.Check RT, CT, discharge, sync and timing traces.
4Pin 8 soft-startRises after startup; not permanently clamped low.Check soft-start capacitor and external trip circuits.
5Pin 10 shutdownNot held at an active shutdown level.Trace overcurrent, overtemperature and protection logic.
6Pin 9 compensation and pins 1/2PWM command is not forced to minimum duty.Check feedback, command input and protection pull-downs.
7Pin 13 VCOutput-stage collector supply present.Repair the VC feed or decoupling path.
8Pins 11 and 14Alternating A/B pulses with comparable shape and amplitude.Isolate output loading, IC output damage or downstream buffer faults.

Visual identification

SG3525A DIP-16 pin-1 orientation and typical control-board position
Pin 1: use the package notch or dot, then confirm against the PCB silkscreen.

SG3525A 16-pin repair map

PinFunctionRepair check
1Inverting inputFeedback and protection command.
2Non-inverting inputCurrent/voltage setpoint.
3SyncExternal synchronization or noise injection.
4Oscillator outputClock activity.
5CTTiming ramp and capacitor condition.
6RTTiming resistor and VREF connection.
7DischargeTiming discharge and dead-time path.
8Soft-startStartup ramp; low clamp blocks duty.
9CompensationError-amplifier output / PWM command.
10ShutdownActive trip blocks both outputs.
11Output AFirst alternating drive output.
12GroundControl-ground reference.
13VCCollector supply for output transistors.
14Output BSecond alternating drive output.
15VCCController supply.
16VREFNominal 5.1 V reference.
SG3525A 16-pin functional repair map
Use pin 12 as the control-ground reference for controller measurements.

Oscillator and timing faults

EvidenceCheck
VREF present, no CT rampCT short/leakage, RT open, pin 7 discharge path, pin 3 sync loading, damaged timing traces.
Frequency unstableCT leakage, RT drift, noisy VREF, poor ground, external sync interference.
Pulse width abnormal on both outputsDead-time network, soft-start, compensation and feedback command.

Device reference: VCC 8 V to 35 V; oscillator range 100 Hz to 400 kHz. The actual welder frequency is board-specific.

Control, soft-start and shutdown

NodeFault indicationNext trace
Pin 8 soft-start stays lowOutputs remain blocked or at minimum duty.Soft-start capacitor, discharge transistor and protection pull-down.
Pin 10 shutdown activeBoth outputs disabled.Current transformer, shunt amplifier, thermal input and protection latch.
Pin 9 compensation forced lowPWM command suppressed.Error amplifier, optocoupler, current/voltage command and external clamp.
Pins 1/2 pinned at a limitFeedback or command fault.Reference divider, potentiometer, current feedback and connector signals.

Output A/B and downstream driver

ObservationLikely areaAction
Both outputs missing; timing and control validVC supply or IC output stage.Verify pin 13 VC, local capacitor and output loading.
Only A or B missingLoaded output, damaged output stage, buffer transistor or open trace.Compare pins 11/14 and isolate downstream load where safe.
A/B present at IC, absent at driver transformerBuffer stage or coupling network.Check transistors, resistors, coupling capacitors and transformer primary.
Driver-transformer secondary unequalTransformer branch, rectifier/clamp or gate network.Compare both branches before installing power devices.

No-PWM workflow

SG3525A no PWM output decision tree
Follow the order shown; do not jump directly to IC replacement.
  1. Prove VCC and control ground.
  2. Prove the 5.1 V reference.
  3. Prove RT/CT timing activity.
  4. Prove soft-start and shutdown are released.
  5. Prove compensation and feedback permit duty.
  6. Prove VC is present.
  7. Compare output A and output B.
  8. If both outputs are correct, move downstream to buffer, transformer, isolation and gate branches.

Stop conditions before power-stage testing

Related repair map

Follow the evidence path from symptom to measurement, circuit and repair case.